Some new information has surfaced regarding Intel’s upcoming Ice Lake-SP Xeon server CPUs. The information was posted by Momomo_US on Twitter and shows the specifications, configs & power ratings of several SKUs that will be part of the 3rd Gen Intel Xeon Scalable processor series codenamed Ice Lake-SP.
Intel’s 3rd Gen Ice Lake-SP Xeon CPUs will be based on the 10nm+ process node which utilizes the Sunny Cove core architecture. The Intel Sunny Cove x86 architecture has been around since 2019 and was first featured on Intel’s 10th Gen Ice Lake processors for the notebook segment.
Intel has since moved over to Tiger Lake which is based on the Willow Cove x86 architecture and makes use of the 10nm SuperFin process node. Some major features of Ice Lake-SP Xeon server CPUs are listed below.
- 2.7x density scaling vs 14nm
- Self-aligned Quad-Patterning
- Contact Over Active Gate
- Cobalt Interconnect (M0, M1)
- 1st Gen Foveros 3D Stacking
- 2nd Gen EMIB
According to Momomo_US, the Ice Lake-SP Xeon processors will come in two types. XCC (Extreme Core Count) and HCC (High Core Count). The XCC SKUs will feature 16, 18, 28, 32, 36, 38, and up to 40 cores. The HCC SKUs will feature 8, 12, 16, 18, 20, 24, 26, and up to 28 cores. The TDPs will range from 105, 135, 150, 165, 185, 205, 220, 235, 250, and all the way up to 270W for the flagship SKU.
The XCC variants with 32, 36, 38, and 40 cores will be configurated at around 205-270W TDPs. As for clock speeds, one 40 core SKU is mentioned to feature a base clock of 2.30 GHz. The boost clock is currently unknown.
The 3rd Gen Ice Lake-SP Xeon CPUs will be going head to head with AMD’s upcoming Milan server CPUs. However, the Intel Ice Lake-SP chip in its current state is just on par with AMD’s Rome lineup. And with Milan launching soon, Intel’s hopes for Ice Lake-SP being competitive in the server segment look very low.
